1. Field of the Invention
The invention relates to field of high-speed, wideband amplifiers used in applications, such as fiber optic communications, ultra high-speed copper communications (e.g. Ethernet) and other broadband communication networks.
2. Description of the Prior Art
The ever-growing demand for higher information transfer rates has resulted in a rapid emergence of highly integrated communication systems. Silicon integrated circuits are the only candidate that can achieve the required level of integration with reasonable speed, cost, and yield and have thus been pursued to a great degree in recent years. In particular, full silicon-based integration of optical-fiber-based data communication systems, such as 10-GB/s (OC192) and 40-GB/s (OC768) SONET or Gigabit ethernet systems, can be of great interest for these reasons. Higher level of integration allowed by integrated circuit technologies (e.g. CMOS, SiGe HBT, etc.) is essential for a system on a chip (SOC) solution.
However, silicon-based integrated circuits implementing such systems face serious challenges due to the inferior parasitic characteristics in silicon-based technologies, complicating the procedure for a wide-band design. Wideband amplifiers are one of the most critical building blocks at the electro-optical interface on both receiver and transmitter sides. Wideband operation is an inseparable part of any baseband communication system such as non-return-to-zero (NRZ) amplitude shift keying (ASK), common to optical fiber communications, due to the signal""s spectral content which ranges down to very low frequencies. Particularly, all amplifiers in the path should have enough bandwidth with minimum variations in the passband and with a constant group-delay to avoid distortion in the signal.
In any high-speed wideband application, signal conditioning is a critical component of the signal path. Unfortunately, traditional integrated circuit design techniques suffer from limited bandwidth due to the RC-time constants of the circuit. For instance, the amplification stage schematically depicted in FIG. 1 is comprised of transistor 10 with an input Miller capacitance 12, a load resistance 14, RL, an output transistor 18 and a node 20 between transistors 10 and 18 to which parasitic capacitance 16, Cparasitic, is coupled. The circuit of FIG. 1 has at least a pole with time constant of xcfx84=RLxc2x7CParasitic, where Cparasitic is the total parasitic capacitance on node 20 due to various sources such as the drain capacitance of transistor 10 and gate capacitance of transistor 18. While this example is given for CMOS transistors, this limitation is quite general and independent of chosen technology.
The inherent parasitic capacitors of the transistors are the main cause of bandwidth limitation in wideband amplifiers. Several bandwidth enhancement methods have been proposed in the past. First order shunt peaking is used to introduce a resonant peaking at the output when the amplitude starts to roll off at high frequencies. Traditionally, it has been done by adding a series inductor with the output load that increases the effective load impedance as the capacitive reactance drops at higher frequencies. Capacitive peaking is another method that can improve the bandwidth. A more exotic approach to solving the problem was proposed by Ginzton et al using distributed amplification. Here, the gain stages are separated with transmission lines. Although the gain contributions of the several stages are added together, the parasitic capacitors can be absorbed into the transmission lines contributing to its real part of the characteristic impedance. Ideally, the number of stages can be increased indefinitely, achieving an unlimited gain bandwidth product. In practice, this will be limited by the loss of the transmission line. Hence, the design of distributed amplifiers requires careful electromagnetic simulations and very accurate modeling of transistor parasitics.
What is needed is some kind of way to minimize the bandwidth degradation due to the parasitic capacitors.
This work introduces a new multi-pole bandwidth enhancement technique for wideband amplifier design. It is based on turning the entire amplifier into a low-pass filter with a well-defined pass-band characteristic and cut-off frequency. The inevitable parasitic capacitances of the transistors are absorbed as part of the low-pass filter structure(s) and hence, affect the bandwidth of the amplifier in a controlled fashion.
More formally, the invention can be understood to be an amplifier comprising a plurality of gain stages in which each of the gain stages has a parasitic capacitance associated therewith and which amplifier is characterized by a corresponding transfer function. At least one network is included which is coupled between two of the gain stages and/or input of the input gain stage and/or outputting of the output gain stage such that the parasitic capacitance associated with at least one of the gain stages is included as part of the network topology. The network""s component values are chosen to provide an enhanced bandwidth as compared to the transfer function of the gain stage as limited by the parasitic capacitance associated therewith. More, generally the amplifier comprises a plurality of networks with a network being coupled between each of the gain stages, and input and output networks.
Normally, each gain stage has an input parasitic capacitance and an output parasitic capacitance and the network coupled between the gain stages incorporates the output parasitic capacitance of a leading one of the two gain stages into its circuit topology and incorporates the input parasitic capacitance of a following one of the two gain stages into its circuit topology. The network comprises a passive network or a low pass filter, or more specifically a third order ladder network. The invention is, however, not necessarily limited to a given type or class of network as long as the teachings of the invention are practiced in modifying the transfer function of the amplifier. Thus, it must be expressly understood that active circuits or filters, or many other types of passive filter designs may be used, which are equivalent to the spirit and sense of the invention to a passive low pass filter or even to third order ladder networks.
The amplifier can also be characterized by a gain bandwidth product and characterized in that the component values are chosen such that the gain bandwidth product of the amplifier is not subject to the Bode-Fano limit.
In the case where the network comprises a third order ladder network of Butterworth type, the two gain stages are characterized by an enhanced bandwidth ratio, BWER, given by   BWER  =                    ω                  c          ,          new                            ω                  c          ,          old                      =                            1                      1            -            δ                          ⁢                              R            2                                              R              1                        +                          R              2                                      ⁢                                            C              1                        +                          C              3                                            C            1                          ⁢                  xe2x80x83                ⁢        where        ⁢                  xe2x80x83                ⁢        δ            =                                                  R              1                        -                          R              2                                                          R              1                        +                          R              2                                      3            
where C1 is the output parasitic capacitance of the leading gain stage, C3 is the input parasitic capacitance of the following gain stage, R1 is the output resistance of the leading gain stage, and R2 is the input resistance of the following gain stage.
Where the input stage is a transimpedance amplifier stage, then the input network is characterized by an enhanced bandwidth ratio, BWER, given by   BWER  =                    ω                  c          ,          new                            ω                  c          ,          old                      =                            1                      1            -            δ                          ⁢                              R            2                                R            1                          ⁢                                            C              1                        +                          C              3                                            C            1                          ⁢                  xe2x80x83                ⁢        where        ⁢                  xe2x80x83                ⁢        δ            =                                                  R              1                        -                          R              2                                                          R              1                        +                          R              2                                      3            
where C1 is the parasitic capacitance of the input source, C3 is the input parasitic capacitance of the following gain stage, R1=2.05 R2, and R2 is the input resistance of the following gain stage.
The invention is further defined as a method of amplifying a signal comprising the steps of amplifying the signal in a plurality of gain stages in which each of the gain stages has a parasitic capacitance associated therewith and is characterized by a corresponding transfer function. The amplified signal is conditioned between the gain stages such that the parasitic capacitance associated with at least one of the gain stages is included as part of the overall transfer function of the gain stages with inserted networks to result in an enhanced bandwidth of the gain stages as compared to the gain stages as limited by the parasitic capacitance associated therewith without signal conditioning.
The step of conditioning the amplified signal between the gain stages is performed in a manner so that that the parasitic capacitance associated with all of the gain stages is included as part of the transfer function of the gain stages, which is implemented by conditioning the amplified signal between each of the gain stages with a corresponding network which incorporates the parasitic capacitances into its circuit topology, which in the illustrated embodiment is a passive network or a low pass filter. Specifically, in the illustrated embodiment the amplified signal is conditioned using a third order ladder network.
The invention can also be defined as a method of amplifying a signal in an amplifier of multiple gain stages having parasitic capacitances comprising the step of amplifying the signal in the amplifier which has been designed for optimized bandwidth performance as determined by amplifier parasitic capacitances and resistances without having any additional signal conditioning performed between gain stages of the amplifier. Then the signal between the gain stages of the amplifier is conditioned using a network with a determined inductance. A new cutoff frequency for the amplifier being determined to obtain a maximally flat frequency response when using the network coupled between the gain stages, which network incorporates the parasitic capacitances and resistances of the optimized amplifier into its circuit topology. The determined inductance required by the network is determined from the new cutoff frequency.
While the apparatus and method has or will be described for the sake of grammatical fluidity with functional explanations, it is to be expressly understood that the claims, unless expressly formulated under 35 USC 112, are not to be construed as necessarily limited in any way by the construction of xe2x80x9cmeansxe2x80x9d or xe2x80x9cstepsxe2x80x9d limitations, but are to be accorded the full scope of the meaning and equivalents of the definition provided by the claims under the judicial doctrine of equivalents, and in the case where the claims are expressly formulated under 35 USC 112 are to be accorded full statutory equivalents under 35 USC 112. The invention can be better visualized by turning now to the following drawings wherein like elements are referenced by like numerals.